A number of applications exist for supports or structures in the form of wafers that have features formed in, or on them. In many cases the features will become part of a final product once wafers are assembled and joined to one another. Where the features of more than one wafer are to be aligned with one another, alignment may be performed at a wafer level, or following cutting of the wafers into parts. Where it is desired to perform the alignment and assembly of the wafers prior to separation of the features from one another, that is, at the wafer level, challenges may arise. For example, challenges may occur in properly placing and adjusting positions of one or more of the wafers so that they are properly aligned with one another, or so that the features of each wafer are aligned with one another to a degree desired in the final product.
Addressing these challenges can be demanding in terms of the wafer processing, feature forming and detection, as well as the fixturing and processing components used during the alignment and assembly operations. As feature sizes become smaller, the challenges involved in alignment, processing, and assembly (e.g., bonding) can become increasingly difficult.